Conventional technologies for manufacturing trench semiconductor power devices are continuously challenged to further reduce the manufacturing cost by reducing the number of masks applied in the manufacturing process. For example, for a trench MOSFET with embedded schottky rectifier, simplifying the manufacturing process and cutting down the manufacturing cost without degrading performance is mainly required by device designing and manufacturing.
Prior art U.S. Pat. No. 7,285,822 disclosed an N-channel trench MOSFET 100 with embedded schottky rectifier as shown in FIG. 1. A plurality of gate trenches 101 are extending into an N− epitaxial layer 102, and surrounded by a plurality of N+ source regions 103 encompassed in P body regions 104, wherein the N+ source regions 103 of the trench MOSFET 100 have a uniform doping concentration and junction depth between sidewalls of trenched source-body contacts 105 and adjacent channel regions near the gate trenches 101. First of all, this uniform distribution of doping concentration and junction depth of the N+ source regions 103 may lead to a hazardous failure during unclamped inductance switching (UIS, the same hereinafter) test at trench corners of the gate trenches 101 and may result in a poor avalanche capability especially for closed cell structure because a parasitic NPN bipolar transistor under the N+ source regions 103 is easily turned on (not shown), which has been disclosed in U.S. Pat. No. 7,816,720 having same inventor and assignee as this application. Second, the manufacturing process of the trench MOSFET 100 needs at least five masks for respectively forming: the gate trenches 101; the P body regions 104; the N+ source regions 103, the trenched source-body contacts 105; metal layers 107 and 107′, which is complicate and cost ineffective.
Moreover, since only one anti-punch through implant region 106 is disposed along the sidewalls of the trenched source-body contacts 105, the bottoms and the sidewalls of the trenched source-body contacts 105 below the P body regions 104 are in contact with the N− epitaxial layer 102 to form schottky rectifiers. Furthermore, as illustrated in FIG. 1, the schottky rectifiers have a depth deeper than the adjacent gate trenches 101, which would lead to a high leakage current enhancement in the schottky rectifiers, because a pinch-off effect existing between the adjacent gate trenches 101 for the leakage current reduction becomes not pronounced.
Therefore, there is still a need in the art of the semiconductor power device, particularly for trench MOSFET with embedded schottky rectifier design and fabrication, to provide a novel cell structure, device configuration that would resolve these difficulties and design limitations without sacrificing other performances.